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'\" te .\" Copyright (c) 2008, 2020, Oracle and/or its affiliates. All rights reserved. .TH isalist 7 "4 May 2020" "Oracle Solaris 11.4" "Standards, Environments, Macros, Character Sets, and miscellany" .SH NAME isalist \- the native instruction sets known to Solaris software .SH DESCRIPTION .sp .LP The possible instruction set names returned by \fBisalist\fR(1) and the \fBSI_ISALIST\fR command of \fBsysinfo\fR(2) are listed here. .sp .LP The list is ordered within an instruction set family in the sense that later names are generally faster then earlier names; note that this is in the reverse order than listed by \fBisalist\fR(1) and \fBsysinfo\fR(2). In the following list of values, numbered entries generally represent increasing performance; lettered entries are either mutually exclusive or cannot be ordered. .sp .LP This feature is obsolete and may be removed in a future version of Solaris. The lists below do not reflect all the extensions that have been made by modern processors. See \fBisainfo\fR(1) and \fBgetisax\fR(2) for better ways to handle instruction set extensions. .SS "SPARC Platforms" .sp .LP Where appropriate, correspondence with a given value of the \fB-xarch\fR option of Oracle Developer Studio C compiler is indicated. Other compilers might have similar options. .sp .ne 2 .mk .na \fB1a. \fBsparc\fR\fR .ad .br .sp .6 .RS 4n Indicates the SPARC V8 instruction set, as defined in \fIThe SPARC Architecture Manual, Version 8\fR, Prentice-Hall, Inc., 1992. Some instructions (such as integer multiply and divide, \fBFSMULD\fR, and all floating point operations on quad operands) can be emulated by the kernel on certain systems. .RE .sp .ne 2 .mk .na \fB1b. \fBsparcv7\fR\fR .ad .br .sp .6 .RS 4n Same as \fBsparc\fR. This corresponds to code produced with the \fB-xarch=v7\fR option of the Oracle Developer Studio C compiler. .RE .sp .ne 2 .mk .na \fB2. \fBsparcv8-fsmuld\fR\fR .ad .br .sp .6 .RS 4n Like \fBsparc\fR, except that integer multiply and divide must be executed in hardware. This corresponds to code produced with the \fB-xarch=v8a\fR option of the Oracle Developer Studio C compiler. .RE .sp .ne 2 .mk .na \fB3. \fBsparcv8\fR\fR .ad .br .sp .6 .RS 4n Like \fBsparcv8-fsmuld\fR, except that \fBFSMULD\fR must also be executed in hardware. This corresponds to code produced with the \fB-xarch=v8\fR option of the Oracle Developer Studio C compiler. .RE .sp .ne 2 .mk .na \fB4. \fBsparcv8plus\fR\fR .ad .br .sp .6 .RS 4n Indicates the SPARC V8 instruction set plus those instructions in the SPARC V9 instruction set, as defined in \fIThe SPARC Architecture Manual, Version 9\fR, Prentice-Hall, 1994, that can be used according to \fIThe V8+ Technical Specification\fR. This corresponds to code produced with the \fB-xarch=v8plus\fR option of the Oracle Developer Studio C compiler. .RE .sp .ne 2 .mk .na \fB5a. \fBsparcv8plus+vis\fR\fR .ad .br .sp .6 .RS 4n Like \fBsparcv8plus\fR, with the addition of those UltraSPARC I Visualization Instructions that can be used according to \fIThe V8+ Technical Specification\fR. This corresponds to code produced with the \fB-xarch=v8plusa\fR option of the Oracle Developer Studio C compiler. .RE .sp .ne 2 .mk .na \fB5b. \fBsparcv8plus+fmuladd\fR\fR .ad .br .sp .6 .RS 4n Like \fBsparcv8plus\fR, with the addition of the Fujitsu SPARC64 floating multiply-add and multiply-subtract instructions. .RE .sp .ne 2 .mk .na \fB6. \fBsparcv9\fR\fR .ad .br .sp .6 .RS 4n Indicates the SPARC V9 instruction set, as defined in \fIThe SPARC Architecture Manual, Version 9\fR, Prentice-Hall, 1994. .RE .sp .ne 2 .mk .na \fB7a. \fBsparcv9+vis\fR\fR .ad .br .sp .6 .RS 4n Like \fBsparcv9\fR, with the addition of the UltraSPARC I Visualization Instructions. .RE .sp .ne 2 .mk .na \fB7b. \fBsparcv9+vis2\fR\fR .ad .br .sp .6 .RS 4n Like \fBsparcv9\fR, with the addition of the UltraSPARC III Visualization Instructions. .RE .sp .ne 2 .mk .na \fB7c. \fBsparcv9+fmuladd\fR\fR .ad .br .sp .6 .RS 4n Like \fBsparcv9\fR, with the addition of the Fujitsu SPARC64 floating multiply-add and multiply-subtract instructions. .RE .SS "x86 Platforms" .sp .ne 2 .mk .na \fB1. \fBi386\fR\fR .ad .br .sp .6 .RS 4n The Intel 80386 instruction set, as described in \fIThe i386 Microprocessor Programmer's Reference Manual\fR. .RE .sp .ne 2 .mk .na \fB2. \fBi486\fR\fR .ad .br .sp .6 .RS 4n The Intel 80486 instruction set, as described in \fIThe i486 Microprocessor Programmer's Reference Manual\fR. (This is effectively \fBi386\fR, plus the \fBCMPXCHG\fR, \fBBSWAP\fR, and \fBXADD\fR instructions.) .RE .sp .ne 2 .mk .na \fB3. \fBpentium\fR\fR .ad .br .sp .6 .RS 4n The Intel Pentium instruction set, as described in \fIThe Pentium Processor User's Manual\fR. (This is effectively \fBi486\fR, plus the \fBCPU_ID\fR instruction, and any features that the \fBCPU_ID\fR instruction indicates are present.) .RE .sp .ne 2 .mk .na \fB4. \fBpentium+mmx\fR\fR .ad .br .sp .6 .RS 4n Like \fBpentium\fR, with the \fBMMX\fR instructions guaranteed present. .RE .sp .ne 2 .mk .na \fB5. \fBpentium_pro\fR\fR .ad .br .sp .6 .RS 4n The Intel PentiumPro instruction set, as described in \fIThe PentiumPro Family Developer's Manual\fR. (This is effectively \fBpentium\fR, with the \fBCMOVcc\fR, \fBFCMOVcc\fR, \fBFCOMI\fR, and \fBRDPMC\fR instructions guaranteed present.) .RE .sp .ne 2 .mk .na \fB6. \fBpentium_pro+mmx\fR\fR .ad .br .sp .6 .RS 4n Like \fBpentium_pro\fR, with the \fBMMX\fR instructions guaranteed present. .RE .sp .ne 2 .mk .na \fB7. \fBamd64\fR\fR .ad .br .sp .6 .RS 4n The AMD Opteron instruction set, as described in the \fIAMD64 Architecture Programmer's Manual\fR. .RE .SH SEE ALSO .sp .LP \fBisalist\fR(1), \fBgetisax\fR(2), \fBsysinfo\fR(2) .sp .LP For information about the \fB-xarch\fR options supported by the C compiler, see the \fIOracle Developer Studio 12.6: C User's Guide\fR (https://docs.oracle.com/cd/E77782_01/html/E77788/bjapr.html#OSSCGbkaza). .SH NOTES .sp .LP Instruction extensions to the native platform ABI are also represented by \fBhardware capabilities\fR. For a complete description of hardware capabilities, refer to the \fIOracle Solaris 11.4 Linkers and Libraries Guide\fR.